diff -ruN ctags-5.6/source.mak ctags-5.6-vhdl/source.mak --- ctags-5.6/source.mak 2004-06-10 05:01:17.000000000 +0200 +++ ctags-5.6-vhdl/source.mak 2006-07-31 23:27:53.000000000 +0200 @@ -47,6 +47,7 @@ strlist.c \ tcl.c \ verilog.c \ + vhdl.c \ vim.c \ yacc.c \ vstring.c @@ -97,6 +98,7 @@ strlist.$(OBJEXT) \ tcl.$(OBJEXT) \ verilog.$(OBJEXT) \ + vhdl.$(OBJEXT) \ vim.$(OBJEXT) \ yacc.$(OBJEXT) \ vstring.$(OBJEXT) diff -ruN ctags-5.6/vhdl.c ctags-5.6-vhdl/vhdl.c --- ctags-5.6/vhdl.c 1970-01-01 01:00:00.000000000 +0100 +++ ctags-5.6-vhdl/vhdl.c 2006-07-31 23:27:26.000000000 +0200 @@ -0,0 +1,43 @@ +/* + * vhdl.c + * Copyright (c) 2006, Sebastian Witt + * + * This source code is released for free distribution under the terms of the + * GNU General Public License. + * + * ctags parser file for VHDL + * + */ + +/* + * INCLUDE FILES + */ +#include "general.h" +#include "parse.h" + +static void installVHDLRegex (const langType language) +{ + addTagRegex(language, "[ \t]*architecture[ \t\n]+([a-zA-Z0-9_]+)[ \t\n]+of[ \t\n]+([a-zA-Z0-9_]+)", "\\2:\\1", "a,architecture", NULL); + addTagRegex(language, "[ \t]*component[ \t\n]+([a-zA-Z0-9_]+)", "\\1", "c,component", NULL); + addTagRegex(language, "[ \t]*configuration[ \t\n]+([a-zA-Z0-9_]+)", "\\1", "o,configuration", NULL); + addTagRegex(language, "[ \t]*constant[ \t\n]+([a-zA-Z0-9_]+)[ \t\n]*:", "\\1", "n,constant", NULL); + addTagRegex(language, "[ \t]*entity[ \t\n]+([a-zA-Z0-9_]+)", "\\1", "e,entity", NULL); + addTagRegex(language, "[ \t]*function[ \t\n]+([a-zA-Z0-9_]+)", "\\1", "f,function", NULL); + addTagRegex(language, "[ \t]*package[ \t\n]+([a-zA-Z0-9_]+)", "\\1", "g,package", NULL); + addTagRegex(language, "[ \t]*package[ \t\n]+body[ \t\n]([a-zA-Z0-9_]+)", "\\1", "b,package body", NULL); + addTagRegex(language, "[ \t]*([a-zA-Z0-9_]+)[ \t\n]+port[ \t\n]+map[ \t\n]+\\(", "\\1", "m,port map", NULL); + addTagRegex(language, "[ \t]*procedure[ \t\n]+([a-zA-Z0-9_]+)", "\\1", "p,procedure", NULL); + addTagRegex(language, "[ \t]*signal[ \t\n]+([a-zA-Z0-9_]+)[ \t\n]*:", "\\1", "s,signal", NULL); + addTagRegex(language, "[ \t]*variable[ \t\n]+([a-zA-Z0-9_]+)[ \t\n]*:", "\\1", "v,variable", NULL); +} + +extern parserDefinition* VHDLParser (void) +{ + static const char *const extensions [] = { "vhd", "vhdl", NULL }; + parserDefinition* def = parserNew ("VHDL"); + def->extensions = extensions; + def->initialize = installVHDLRegex; + def->regex = TRUE; + return def; +} +